1. Field of the Invention
The present invention generally relates to audio/video signal processing and, more particularly, to memory bus assignment to various functional devices in an audio/video signal processing system.
2. Description of the Related Art
In an audio/video (A/V) signal processing system (e.g., an MPEG codec (coder-decoder)), processed A/V signals at various functional devices therein compete for processing attention in the system. As the various types of A/V signals are processed, they need to be attended to in the system memory block for signal processing, e.g., compression, decompression, and resolution of motion estimation vectors. A plurality of functional devices compete for control and access over the memory bus in the codec system so as to transfer the appropriate A/V data into and out of the memory blocks.
Fixed memory bus arbitration methodologies in a conventional A/V signal processing system employ even distribution of memory resources among the competing functional devices. However, data processing for the various functional devices typical in an A/V signal processing system (such as codecs for MPEG applications) poses varying processing requirements. Poor management of the memory resource assignment among the functional devices of an A/V signal processing system results in reduced overall system performance. Moreover, video display may become sluggish and appear less than smooth for visual viewing. Measures such as improved processing power may improve system performance but are resource-intensive and cost-prohibitive.
There is therefore a general need in the art for an optimal method and device for memory bus assignment to various functional devices in an audio/video signal processing system. A particular need exists in the art for an arbiter device for controlling memory bus assignment in audio/video signal processing systems that optimally provides prioritized access to functional devices in the system for memory resource access based on preset priorities. There is a further need in the art for an arbiter device for controlling memory bus assignment in audio/video signal processing systems that dynamically provides prioritized access to functional devices of the system for memory resource access according to changing operational requirements.